PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Ha, Yajun"

Author of the publication

copydeleteadd this publication to your clipboard
TRISHUL: A Single-pass Optimal Two-level Inclusive Data Cache Hierarchy Selection Process for Real-time MPSoCs.

, , , , and . CoRR, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Dr. Jürgen Hampel University of Stuttgart

Wahrnehmung von Technik und Digitalisierung in Deutschland und Europa : Befunde aus dem TechnikRadar, , , and . HMD - Praxis der Wirtschaftsinformatik, 57 (1): 21-32 (2020)

PD Dr. Stefan Hattula University of Stuttgart

The relationship between consumer shopping stress and purchase abandonment in task-oriented and recreation-oriented consumers, , and . JOURNAL of the Academy of Marketing Science, 45 (5): 720-740 (2017)

Apl. Prof. Dr. -Ing. Niels Hansen University of Stuttgart

Efficient Generation of Torsional Energy Profiles by Multifidelity Gaussian Processes for Hindered Rotor Corrections, , , , , and . Journal of Chemical Theory and Computation, 20 (17): 7574–7585 (August 2024)

Manuel Hagg

Uli Hahn

 

Other publications of authors with the same name

Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects., , , , and . PDPTA, CSREA Press, (2000)Design of Networked Reconfigurable Encryption Engine., and . FCCM, page 285-286. IEEE Computer Society, (2005)Robustness-driven energy-efficient ultra-low voltage standard cell design with intra-cell mixed-Vt methodology., , , and . ISLPED, page 323-328. IEEE, (2013)Fast and Accurate Interval-Based Timing Estimator for Variability-Aware FPGA Physical Synthesis Tools., , , and . FPL, page 279-284. IEEE, (2007)FPGA based Rekeying for cryptographic key management in Storage Area Network., and . FPL, page 1-6. IEEE, (2013)ParaFRo: A hybrid parallel FPGA router using fine grained synchronization and partitioning., , and . FPL, page 1-11. IEEE, (2016)High throughput and resource efficient AES encryption/decryption for SANs., and . ISCAS, page 1166-1169. IEEE, (2016)Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base., , , , , and . IEEE Trans. VLSI Syst., 27 (9): 2156-2169 (2019)A DFA-Resistant and Masked PRESENT with Area Optimization for RFID Applications., and . ACM Trans. Embedded Comput. Syst., 16 (4): 102:1-102:22 (2017)Analyzing composability of applications on MPSoC platforms., , , , and . Journal of Systems Architecture - Embedded Systems Design, 54 (3-4): 369-383 (2008)