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A DFT Technique for Analog-to-Digital Converters with digital correction.

, , and . VTS, page 302-307. IEEE Computer Society, (1997)

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Structural testing of pipelined analog to digital converters., , and . ISCAS (1), page 436-439. IEEE, (2001)Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator., , , , , , and . ETS, page 1-6. IEEE, (2016)Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus., , and . IEEE Trans. Instrumentation and Measurement, 60 (2): 452-461 (2011)Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell., , , , and . IEEE Design & Test of Computers, 19 (6): 73-82 (2002)Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS., , and . SBCCI, page 21-26. ACM, (2007)Statistical behavioral modeling and characterization of A/D converters., , and . ICCAD, page 562-566. IEEE Computer Society / ACM, (1995)SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems., , , , and . DAC, page 281-286. ACM Press, (1997)INL systematic reduced-test technique for Pipeline ADCs., , and . ETS, page 1-6. IEEE, (2014)Semi-empirical RF MOST model for CMOS 65 nm technologies: Theory, extraction method and validation., and . Integration, (2016)Digital self-tuning technique for continuous-time filters., , , , and . ICECS, page 1-4. IEEE, (2005)