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A Performance and Power Co-optimization Approach for Modern Processors., , and . CIT, page 822-828. IEEE Computer Society, (2005)Dynamic memory optimization using pool allocation and prefetching., , and . SIGARCH Computer Architecture News, 33 (5): 27-32 (2005)Evaluation of the Hitachi S-3800 Supercomputer Using Six Benchmarks., , and . IJHPCA, 9 (1): 58-70 (1995)TreeFTL: efficient RAM management for high performance of NAND flash-based storage systems., and . DATE, page 374-379. EDA Consortium San Jose, CA, USA / ACM DL, (2013)BSN Simulator: Optimizing Application Using System Level Simulation., , , , , , , , , and 2 other author(s). BSN, page 9-14. IEEE Computer Society, (2009)Ubiquitous Memory Introspection., , , , and . CGO, page 299-311. IEEE Computer Society, (2007)Compiling to FPGAs via an EPIC compiler's intermediate representation., , and . FPT, page 431-434. IEEE, (2003)Defining neighborhood relations for fast spatial-temporal partitioning of applications on reconfigurable architectures., , and . FPT, page 121-128. IEEE, (2008)A co-simulation study of adaptive EPIC computing., , , and . FPT, page 268-275. IEEE, (2002)Generating hardware from OpenMP programs., , and . FPT, page 73-80. IEEE, (2006)