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A software-based dynamic-warp scheduling approach for load-balancing the Viola-Jones face detection algorithm on GPUs.

, , , , and . J. Parallel Distrib. Comput., 73 (5): 677-685 (2013)

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A practical testing framework for isolating hardware timing channels., , , and . DATE, page 1281-1284. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Expanding Gate Level Information Flow Tracking for Multilevel Security., , , , and . Embedded Systems Letters, 5 (2): 25-28 (2013)On the Complexity of Generating Gate Level Information Flow Tracking Logic., , , , , , and . IEEE Trans. Information Forensics and Security, 7 (3): 1067-1080 (2012)Theoretical analysis of gate level information flow tracking., , , , , and . DAC, page 244-247. ACM, (2010)Detecting Hardware Trojans with Gate-Level Information-Flow Tracking., , , and . IEEE Computer, 49 (8): 44-52 (2016)Gate-Level Information Flow Tracking for Security Lattices., , , , , , and . ACM Trans. Design Autom. Electr. Syst., 20 (1): 2:1-2:25 (2014)Eliminating Timing Information Flows in a Mix-Trusted System-on-Chip., , and . IEEE Design & Test, 30 (2): 55-62 (2013)Simultaneous information flow security and circuit redundancy in Boolean gates., , , and . ICCAD, page 585-590. ACM, (2012)Information flow isolation in I2C and USB., , , , , and . DAC, page 254-259. ACM, (2011)Simulate and Eliminate: A Top-to-Bottom Design Methodology for Automatic Generation of Application Specific Architectures., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (8): 1173-1183 (2011)