Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors., , and . IPDPS, page 721-728. IEEE Computer Society, (2000)A Network Processor-Based, Content-Aware Switch., , , and . IEEE Micro, 26 (3): 72-84 (2006)SpliceNP: a TCP splicer using a network processor., , , and . ANCS, page 135-143. ACM, (2005)Hardware Support for Bulk Data Movement in Server Platforms., , , , and . ICCD, page 53-60. IEEE Computer Society, (2005)Reducing cache and TLB power by exploiting memory region and privilege level semantics., , , , , , and . Journal of Systems Architecture - Embedded Systems Design, 59 (6): 279-295 (2013)QoS policies and architecture for cache/memory in CMP platforms., , , , , , , , and . SIGMETRICS, page 25-36. ACM, (2007)Rate-based QoS techniques for cache/memory in CMP platforms., , , , , and . ICS, page 479-488. ACM, (2009)Comparing the memory system performance of the HP V-class and SGI Origin 2000 multiprocessors using microbenchmarks and scientific applications., , , and . International Conference on Supercomputing, page 339-347. ACM, (1999)Performance of Multistage Bus Networks for a Distributed Shared Memory Multiprocessor., , , , and . IEEE Trans. Parallel Distrib. Syst., 8 (1): 82-95 (1997)Characterization and Evaluation of Cache Hierarchies for Web Servers.. World Wide Web, 7 (3): 259-280 (2004)