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Disambiguation of "Kolasa, Marta"

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Parallel, Asynchronous Winner Selection Circuit for Hardware Implemented Self-Organizing Maps.

, , and . MIXDES, page 184-187. IEEE, (2018)

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Marta Burczyk University of Stuttgart

Marta Gil Pérez University of Stuttgart

 

Other publications of authors with the same name

Efficient methods of initializing neuron weights in self-organizing networks implemented in hardware., , , and . Applied Mathematics and Computation, (2018)Fisherman learning algorithm of the SOM realized in the CMOS technology., , and . ESANN, (2011)Programmable triangular neighborhood functions of Kohonen Self-Organizing Maps realized in CMOS technology., , and . ESANN, (2010)Parallel Programmable Asynchronous Neighborhood Mechanism for Kohonen SOM Implemented in CMOS Technology., , , and . IEEE Trans. Neural Networks, 22 (12): 2091-2104 (2011)Parallel, Asynchronous Winner Selection Circuit for Hardware Implemented Self-Organizing Maps., , and . MIXDES, page 184-187. IEEE, (2018)An efficient initialization mechanism of neurons for Winner Takes All Neural Network implemented in the CMOS technology., , , and . Applied Mathematics and Computation, (2015)Parallel asynchronous neighborhood mechanism for WTM Kohonen network implemented in CMOS technology., and . ESANN, page 331-336. (2008)New Fast Training Algorithm Suitable for Hardware Kohonen Neural Networks Designed for Analysis of Biomedical Signals., and . BIODEVICES, page 364-367. INSTICC Press, (2009)An advanced software model for optimization of self-organizing neural networks oriented on implementation in hardware., and . MIXDES, page 266-271. IEEE, (2015)A novel recursive algorithm used to model hardware programmable neighborhood mechanism of self-organizing neural networks., , and . Applied Mathematics and Computation, (2015)