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FPGA-based architecture for real-time synaptic plasticity computation.

B. Belhadj, J. Tomas, O. Malot, G. N'Kaoua, Y. Bornat, and S. Renaud. ICECS, page 93-96. IEEE, (2008)

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Capacitance of TSVs in 3-D stacked chips a problem?: not for neuromorphic systems!A. Joubert, M. Duranton, B. Belhadj, O. Temam, and R. Héliot. DAC, page 1264-1265. ACM, (2012)Configurable conduction delay circuits for high spiking rates.B. Belhadj, A. Joubert, O. Temam, and R. Héliot. ISCAS, page 2091-2094. IEEE, (2012)Real-time multi-board architecture for analog spiking neural networks.S. Saïghi, J. Tomas, Y. Bornat, B. Belhadj, O. Malot, and S. Renaud. ISCAS, page 1939-1942. IEEE, (2010)The improbable but highly appropriate marriage of 3D stacking and neuromorphic accelerators.B. Belhadj, A. Valentian, P. Vivet, M. Duranton, L. He, and O. Temam. CASES, page 1:1-1:9. ACM, (2014)Guaranteeing spike arrival time in multiboard & multichip spiking neural networks.B. Belhadj, J. Tomas, O. Malot, Y. Bornat, G. N'Kaoua, and S. Renaud. ISCAS, page 377-380. IEEE, (2010)Advanced technologies for brain-inspired computing.F. Clermidy, R. Héliot, A. Valentian, C. Gamrat, O. Bichler, M. Duranton, B. Belhadj, and O. Temam. ASP-DAC, page 563-569. IEEE, (2014)Hardware system for biologically realistic, plastic, and real-time spiking neural network simulations.S. Saïghi, T. Levi, B. Belhadj, O. Malot, and J. Tomas. IJCNN, page 1-7. IEEE, (2010)Hardware spiking neurons design: Analog or digital?A. Joubert, B. Belhadj, O. Temam, and R. Héliot. IJCNN, page 1-5. IEEE, (2012)FPGA-based architecture for real-time synaptic plasticity computation.B. Belhadj, J. Tomas, O. Malot, G. N'Kaoua, Y. Bornat, and S. Renaud. ICECS, page 93-96. IEEE, (2008)LEOSoC: An Open-Source Cross-Platform Embedded Linux Library for Managing Hardware Accelerators in Heterogeneous System-on-Chips(Abstract Only).A. Guerrieri, S. Kashani-Akhavan, M. Asiatici, P. Lombardi, B. Belhadj, and P. Ienne. FPGA, page 295. ACM, (2018)

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Disambiguation of "Belhadj, Bilel"

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FPGA-based architecture for real-time synaptic plasticity computation.

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Disambiguation of "Belhadj, Bilel"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML FPGA-based architecture for real-time synaptic plasticity computation.

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FPGA-based architecture for real-time synaptic plasticity computation.