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An integer linear programming-based tool for wireless sensor networks., , , and . J. Parallel Distrib. Comput., 65 (3): 247-260 (2005)Designing a 3-D FPGA: Switch Box Architecture and Thermal Issues., , , and . IEEE Trans. VLSI Syst., 16 (7): 882-893 (2008)Design of Thermally Robust Clock Trees Using Dynamically Adaptive Clock Buffers., , , , , , and . IEEE Trans. on Circuits and Systems, 56-I (2): 374-383 (2009)Java Runtime Systems: Characterization and Architectural Implications., , , , , and . IEEE Trans. Computers, 50 (2): 131-146 (2001)Network-on-Chip Architectures - A Holistic Design Exploration, , and . Lecture Notes in Electrical Engineering Springer, (2010)Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks., , , and . VLSI Design, page 248-253. IEEE Computer Society, (2001)Tunnel FET RF Rectifier Design for Energy Harvesting Applications., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 4 (4): 400-411 (2014)Energy-performance trade-offs for spatial access methods on memory-resident data., , , , , and . VLDB J., 11 (3): 179-197 (2002)Refresh Enabled Video Analytics (REVA): Implications on power and performance of DRAM supported embedded visual systems., , , , , , and . ICCD, page 501-504. IEEE Computer Society, (2014)Exploiting natural redundancy in visual information., , , , and . ICCD, page 505-508. IEEE Computer Society, (2014)