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SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems.

, , , , , , , , , , , , , and . IEEE Trans. Computers, 68 (5): 765-783 (2019)

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Differential Fault Injection on Microarchitectural Simulators., , , , and . IISWC, page 172-182. IEEE Computer Society, (2015)Low Energy Online Self-Test of Embedded Processors in Dependable WSN Nodes., , , and . IEEE Trans. Dependable Sec. Comput., 9 (1): 86-100 (2012)Low Cost Convolutional Code Based Concurrent Error Detection in FSMs., , and . DFT, page 344-351. IEEE Computer Society, (2003)Test Generation Methodology for High-Speed Floating Point Adders., , , and . IOLTS, page 227-232. IEEE Computer Society, (2005)Online error detection in multiprocessor chips: A test scheduling study., , , , and . IOLTS, page 169-172. IEEE, (2013)Guest Editors' Introduction: Special Section on Dependable Computer Architecture., and . IEEE Trans. Computers, 60 (1): 3-4 (2011)Software-Based Self-Testing of Embedded Processors., , , and . IEEE Trans. Computers, 54 (4): 461-475 (2005)Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time., , and . IEEE Trans. VLSI Syst., 13 (9): 1079-1086 (2005)An Effective BIST Scheme for Datapaths., , and . ITC, page 76-85. IEEE Computer Society, (1996)Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores., , , , and . ITC, page 431-440. IEEE Computer Society, (2003)