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Is TSV-based 3D integration suitable for inter-die memory repair?

, , , , , and . DATE, page 1251-1254. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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On resistive open defect detection in DRAMs: The charge accumulation effect., , , and . ETS, page 1-6. IEEE, (2015)Memristive Devices for Computation-In-Memory., , , , and . CoRR, (2019)Memristive devices for computation-in-memory., , , , and . DATE, page 1646-1651. IEEE, (2018)Pinhole Defect Characterization and Fault Modeling for STT-MRAM Testing., , , , , , , , and . ETS, page 1-6. IEEE, (2019)Computation-in-memory based parallel adder., , , , , and . NANOARCH, page 57-62. IEEE Computer Society, (2015)Quality versus cost analysis for 3D Stacked ICs., , and . VTS, page 1-6. IEEE Computer Society, (2014)A defect-oriented test approach using on-Chip current sensors for resistive defects in FinFET SRAMs., , , , and . Microelectronics Reliability, (2018)RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems., , , , , , , , , and 8 other author(s). CoRR, (2019)Device Aging : A Reliability and Security Concern, , , , , , , , and . 2018 23RD IEEE European Test Symposium (ETS), IEEE, (2018)Direct probing on large-array fine-pitch micro-bumps of a wide-I/O logic-memory interface., , , , , and . ITC, page 1-10. IEEE Computer Society, (2014)