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Formal Verification Using Edge-Valued Binary Decision Diagrams.

Y. Lai, M. Pedram, and S. Vrudhula. IEEE Trans. Computers, 45 (2): 247-255 (1996)

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Univ. -Prof. Dr. -Ing. Stefan Tenbohlen University of Stuttgart

Using capacitive electric field sensors to measure transient overvoltages : a case studyF. Probst, M. Beltle, M. Gerber, S. Tenbohlen, and K. Alsdorf. 23rd International Symposium on High Voltage Engineering (ISH 2023), page 20-25. Stevenage, Institution of Engineering and Technology, (2023)Measurement System for Surface Potentials in Realistic HVDC-GIS EnvironmentsL. Baronat, M. Beltle, S. Tenbohlen, and U. Riechert. 23rd International Symposium on High Voltage Engineering (ISH 2023), page 543-547. Stevenage, Institution of Engineering and Technology, (2023)Measurement and Simulation of the Shielding Effectiveness of Planar Material with Apertures using a ASTM D4935 TEM CellM. Gruber, M. Beltle, and S. Tenbohlen. 2023 International Symposium on Electromagnetic Compatibility : EMC Europe, IEEE, (2023)

Rafael Antonio Lainez Reyes University of Stuttgart

Robin Laidig University of Stuttgart

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Dipl.-Ing. Philipp Tempel

Kinematics and dynamics modeling for real-time simulation of the cable-driven parallel robot IPAnema 3P. Tempel, P. Miermeister, and A. Pott. Proceedings of the 14th IFToMM World Congress, page 117-123. Taipei, IFToMM, (2015)SimTech Status Seminar 2014 - Status Update: Improved Modeling of Cables for Kinematics and Dynamics of Light-weight RobotsP. Tempel. (Dec 12, 2014)Design and programming for cable-driven parallel robots in the German pavilion at the EXPO 2015P. Tempel, F. Schnelle, A. Pott, and P. Eberhard. Machines, 3 (3): 223-241 (2015)

Other publications of authors with the same name

EVBDD-based algorithms for integer linear programming, spectral transformation, and function decomposition.Y. Lai, M. Pedram, and S. Vrudhula. IEEE Trans. on CAD of Integrated Circuits and Systems, 13 (8): 959-975 (1994)OBDD-based function decomposition: algorithms and implementation.Y. Lai, K. Pan, and M. Pedram. IEEE Trans. on CAD of Integrated Circuits and Systems, 15 (8): 977-990 (1996)BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis.Y. Lai, M. Pedram, and S. Vrudhula. DAC, page 642-647. ACM Press, (1993)Formal Verification Using Edge-Valued Binary Decision Diagrams.Y. Lai, M. Pedram, and S. Vrudhula. IEEE Trans. Computers, 45 (2): 247-255 (1996)Edge-Valued Binary Decision Diagrams for Multi-Level Hierarchical Verification.Y. Lai, and S. Sastry. DAC, page 608-613. (1992)Boolean Matching Using Binary Decision Diagrams with Applications to Logic Synthesis and Verification.Y. Lai, S. Sastry, and M. Pedram. ICCD, page 452-458. IEEE Computer Society, (1992)FPGA Synthesis Using Function Decomposition.Y. Lai, K. Pan, and M. Pedram. ICCD, page 30-35. IEEE Computer Society, (1994)Performance Evaluation of the Largest-first/First-fit Dynamic Storage Allocation Technique.J. Carroll, L. Beck, and Y. Lai. Performance, page 325-340. North-Holland, (1983)FGILP: an integer linear program solver based on function graphs.Y. Lai, M. Pedram, and S. Vrudhula. ICCAD, page 685-689. IEEE Computer Society / ACM, (1993)

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Disambiguation of "Lai, Yung-Te"

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Formal Verification Using Edge-Valued Binary Decision Diagrams.

Please choose a person to relate this publication to

Univ. -Prof. Dr. -Ing. Stefan Tenbohlen University of Stuttgart

Rafael Antonio Lainez Reyes University of Stuttgart

Robin Laidig University of Stuttgart

test

Dipl.-Ing. Philipp Tempel

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Lai, Yung-Te"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Formal Verification Using Edge-Valued Binary Decision Diagrams.

Please choose a person to relate this publication to

Univ. -Prof. Dr. -Ing. Stefan Tenbohlen University of Stuttgart

Rafael Antonio Lainez Reyes University of Stuttgart

Robin Laidig University of Stuttgart

test

Dipl.-Ing. Philipp Tempel

Other publications of authors with the same name

Disambiguation

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URL
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Formal Verification Using Edge-Valued Binary Decision Diagrams.