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An FPGA-Based Liquid Association Calculator for Genome-Wide Co-Expression Analysis.

, , , and . DSL, page 1-4. IEEE, (2018)

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A Hybrid Flow for Multiple Sequence Alignment with a BLASTn Based Pairwise Alignment Processor., , , , and . ISCAS, page 1-5. IEEE, (2018)An FPGA-Based Liquid Association Calculator for Genome-Wide Co-Expression Analysis., , , and . DSL, page 1-4. IEEE, (2018)Step shift: A fast image segmentation algorithm and its hardware implementation for next-generation sequencing fluorescence data., , , , and . APCCAS, page 202-205. IEEE, (2016)An FPGA-based quality filter for de novo sequence assembly pipeline., , , and . APCCAS, page 139-142. IEEE, (2016)Banded Pair-HMM Algorithm for DNA Variant Calling and Its Hardware Accelerator Design., , , and . BIBE, page 563-566. IEEE, (2019)Design and Implementation of a SIP-Based Mobile and Vehicular Wireless Network With Push Mechanism., , and . IEEE Trans. Vehicular Technology, 56 (6): 3408-3420 (2007)A Memory-Efficient FM-Index Constructor for Next-Generation Sequencing Applications on FPGAs., , and . ISCAS, page 1-4. IEEE, (2018)Adaptively Banded Smith-Waterman Algorithm for Long Reads and Its Hardware Accelerator., , , and . ASAP, page 1-9. IEEE Computer Society, (2018)Prioritized resource reservation for reducing random access delay in 5G URLLC., , and . PIMRC, page 1-5. IEEE, (2017)Hardware Accelerator Design for Dynamic-Programming-Based Protein Sequence Alignment with Affine Gap Tracebacks., , and . BioCAS, page 1-4. IEEE, (2019)