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MetaWire: Using FPGA configuration circuitry to emulate a network-on-chip.

, , , , , and . IET Computers & Digital Techniques, 4 (3): 159-169 (2010)

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A Methodology for Generating Application-Specific Heterogeneous Processor Arrays., , and . HICSS, IEEE Computer Society, (2006)PATIS: Using partial configuration to improve static FPGA design productivity., , , , , and . IPDPS Workshops, page 1-8. IEEE, (2010)Thwarting Software Attacks on Data-Intensive Platforms with Configurable Hardware-Assisted Application Rule Enforcement., , and . FPL, page 207-212. IEEE Computer Society, (2011)Formal Modeling of Process Migration., , and . FPL, page 104-110. IEEE, (2007)Hardware/Software Process Migration and RTL Simulation., and . FPL, page 585-588. IEEE, (2007)High-Level Abstractions and Modular Debugging for FPGA Design Validation., , and . TRETS, 7 (1): 2:1-2:22 (2014)Slotless module-based reconfiguration of embedded FPGAs., , , , , , and . ACM Trans. Embedded Comput. Syst., 9 (1): 6:1-6:26 (2009)Semidefinite Relaxation-Based PAPR-Aware Precoding for Massive MIMO-OFDM Systems., , , , , and . IEEE Trans. Vehicular Technology, 68 (3): 2229-2243 (2019)A hands-on modular laboratory environment to foster learning in control system security., , and . FIE, page 1-9. IEEE Computer Society, (2016)Using high-level synthesis and formal analysis to predict and preempt attacks on industrial control systems., , , and . FPGA, page 209-212. ACM, (2014)