Author of the publication

Modified Sliding-Block Distributed Arithmetic with Offset Binary Coding for Adaptive Filters.

, and . Signal Processing Systems, 63 (1): 153-163 (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A novel high performance distributed arithmetic adaptive filter implementation on an FPGA., , , , and . ICASSP (5), page 161-164. IEEE, (2004)VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter., , , and . ISCAS, page 2168-2171. IEEE, (2007)A Reconfigurable Mixed-Signal VLSI Implementation of Distributed Arithmetic Used for Finite-Impulse Response Filtering., , , and . IEEE Trans. on Circuits and Systems, 55-I (2): 510-521 (2008)An FPGA Implementation for a High Throughput Adaptive Filter Using Distributed Arithmetic., , , , and . FCCM, page 324-325. IEEE Computer Society, (2004)Measurement, Characterization and Modeling of LoRa Technology in Multi-floor Buildings., , , , , and . CoRR, (2019)LMS adaptive filters using distributed arithmetic for high throughput., , , , and . IEEE Trans. on Circuits and Systems, 52-I (7): 1327-1337 (2005)Modified Sliding-Block Distributed Arithmetic with Offset Binary Coding for Adaptive Filters., and . Signal Processing Systems, 63 (1): 153-163 (2011)Adaptive filters using modified sliding-block distributed arithmetic with offset binary coding., and . ICASSP, page 545-548. IEEE, (2009)The Design, Implementation, and Deployment of a Smart Lighting System for Smart Buildings., , , , , , and . IEEE Internet of Things Journal, 6 (4): 7266-7281 (2019)