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A hardware accelerated multilevel visual classifier for embedded visual-assist systems.

, , , , and . ICCAD, page 96-100. IEEE, (2014)

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Understanding the landscape of accelerators for vision., , , , , , , and . SiPS, page 280-285. IEEE, (2014)Design of energy-efficient circuits and systems using tunnel field effect transistors., , , , , , and . IET Circuits, Devices & Systems, 7 (5): 294-303 (2013)Ultra Low Power Circuit Design Using Tunnel FETs., , , , , and . ISVLSI, page 153-158. IEEE Computer Society, (2012)Enabling New Computation Paradigms with HyperFET - An Emerging Device., , , , , , , , , and 5 other author(s). IEEE Trans. Multi-Scale Computing Systems, 2 (1): 30-48 (2016)Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications., , , and . ISQED, page 430-437. IEEE, (2013)Neuro Inspired Computing with Coupled Relaxation Oscillators., , , , and . DAC, page 74:1-74:6. ACM, (2014)Visual co-occurrence network: using context for large-scale object recognition in retail., , , , , , and . ESTIMedia, page 1-10. IEEE, (2015)A hardware accelerated multilevel visual classifier for embedded visual-assist systems., , , , and . ICCAD, page 96-100. IEEE, (2014)FPGA-accelerator system for computing biologically inspired feature extraction models., , , , , , and . ACSCC, page 751-755. IEEE, (2011)Accelerating neuromorphic vision algorithms for recognition., , , , , , and . DAC, page 579-584. ACM, (2012)