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Disambiguation of "Xydis, Sotirios"

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Thermal-aware datapath merging for coarse-grained reconfigurable processors.

, , and . DATE, page 1649-1654. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Other publications of authors with the same name

High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor Architectures., , , and . ISVLSI, page 486-487. IEEE Computer Society, (2010)Voltage island management in near threshold manycore architectures to mitigate dark silicon., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Variability-Aware Voltage Island Management for Near-Threshold Computing with Performance Guarantees., , , and . Near Threshold Computing, Springer, (2016)Multi-Level Approximate Accelerator Synthesis Under Voltage Island Constraints., , , and . IEEE Trans. on Circuits and Systems, 66-II (4): 607-611 (2019)Reconfigurable Computing for Analytics Acceleration of Big Bio-Data: The AEGLE Approach., , and . ARC, volume 9040 of Lecture Notes in Computer Science, page 531-541. Springer, (2015)Approximate Multiplier Architectures Through Partial Product Perforation: Power-Area Tradeoffs Analysis., , , , and . ACM Great Lakes Symposium on VLSI, page 229-232. ACM, (2015)High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators on FPGAs., , , and . FPL, page 1-2. IEEE, (2015)GENESIS: Parallel Application Placement onto Reconfigurable Architectures (Invited for the Special Issue on Runtime Management)., , , and . ACM Trans. Embedded Comput. Syst., 14 (1): 18:1-18:26 (2015)High-level synthesis with coarse grain reconfigurable components., and . IPDPS, page 1-4. IEEE, (2009)Performance-power exploration of software-defined big data analytics: The AEGLE cloud backend., , and . SAMOS, page 312-319. IEEE, (2016)