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Fast and Reliable STT-MRAM Using Nonuniform and Adaptive Error Detecting and Correcting Scheme.

, , and . IEEE Trans. VLSI Syst., 27 (6): 1329-1342 (2019)

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Investigation of NBTI and PBTI induced aging in different LUT implementations., , and . FPT, page 1-8. IEEE, (2011)Investigation of aging effects in different implementations and structures of programmable routing resources of FPGAs., , and . FPT, page 215-219. IEEE, (2012)Protecting caches against multi-bit errors using embedded erasure coding., , , , and . ETS, page 1-6. IEEE, (2015)Reducing wearout in embedded processors using proactive fine-grain dynamic runtime adaptation., and . European Test Symposium, page 1-6. IEEE Computer Society, (2012)Re-using BIST for circuit aging monitoring., , , , , and . ETS, page 1-2. IEEE, (2015)High-level aging estimation for FPGA-mapped designs., and . FPL, page 284-291. IEEE, (2012)Towards dark silicon era in FPGAs using complementary hard logic design., , , , and . FPL, page 1-6. IEEE, (2014)Representative critical-path selection for aging-induced delay monitoring., , , and . ITC, page 1-10. IEEE Computer Society, (2013)Low-Cost Multiple Bit Upset Correction in SRAM-Based FPGA Configuration Frames., , , and . IEEE Trans. VLSI Syst., 24 (3): 932-943 (2016)Techniques and algorithms for fault grading of FPGA interconnect test configurations., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (2): 261-272 (2004)