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Scalable conditional induction variables (CIV) analysis.

, and . CGO, page 213-224. IEEE Computer Society, (2015)

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Scalable conditional induction variables (CIV) analysis., and . CGO, page 213-224. IEEE Computer Society, (2015)Restructuring Programs for High-Speed Computers with Polaris., , , , , , , , , and 4 other author(s). ICPP Workshop, page 149-161. IEEE Computer Society, (1996)0-8186-7623-X.The R-LRPD Test: Speculative Parallelization of Partially Parallel Loops., , and . IPDPS, IEEE Computer Society, (2002)KLA: a new algorithmic paradigm for parallel graph computations., , , and . PACT, page 27-38. ACM, (2014)Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors., , , , , and . HPCA, page 191-202. IEEE Computer Society, (2003)A hierarchical approach to reducing communication in parallel graph algorithms., , and . PPOPP, page 285-286. ACM, (2015)A multiple floating point coprocessor architecture., and . MICRO, page 216-222. ACM/IEEE, (1990)Implementation Issues of Loop-Level Speculative Run-Time Parallelization., and . CC, volume 1575 of Lecture Notes in Computer Science, page 183-197. Springer, (1999)Scalable Array SSA and Array Data Flow Analysis., , and . LCPC, volume 4339 of Lecture Notes in Computer Science, page 397-412. Springer, (2005)Custom Memory Allocation for Free., and . LCPC, volume 4382 of Lecture Notes in Computer Science, page 299-313. Springer, (2006)