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Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits.

, , , , , , , , , , , , , , and . IEEE Trans. on Circuits and Systems, 64-I (9): 2250-2262 (2017)

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Michael Beltle University of Stuttgart

Measurement System for Surface Potentials in Realistic HVDC-GIS Environments, , , and . 23rd International Symposium on High Voltage Engineering (ISH 2023), page 543-547. Stevenage, Institution of Engineering and Technology, (2023)
Measurement System for Surface Potentials in Realistic HVDC-GIS Environments, , , and . 23rd International Symposium on High Voltage Engineering (ISH 2023), page 543-547. Stevenage, Institution of Engineering and Technology, (2023)Measurement and Simulation of the Shielding Effectiveness of Planar Material with Apertures using a ASTM D4935 TEM Cell, , and . 2023 International Symposium on Electromagnetic Compatibility : EMC Europe, IEEE, (2023)Using capacitive electric field sensors to measure transient overvoltages : a case study, , , , and . 23rd International Symposium on High Voltage Engineering (ISH 2023), page 20-25. Stevenage, Institution of Engineering and Technology, (2023)
 

Other publications of authors with the same name

A low-power parallel design of discrete wavelet transform using subthreshold voltage technology., , and . CASES, page 235-244. ACM, (2008)ASIC implementations of five SHA-3 finalists., , , , , , and . DATE, page 1006-1011. IEEE, (2012)Pre-silicon Characterization of NIST SHA-3 Final Round Candidates., , , , , , and . DSD, page 535-542. IEEE Computer Society, (2011)Fast Simulation Framework for Subthreshold Circuits., , and . ISCAS, page 2549-2552. IEEE, (2009)Fast Approximation Framework for Timing and Power Analysis of Ultra-Low-Voltage Circuits., , and . IEEE Trans. on Circuits and Systems, 60-I (6): 1501-1510 (2013)NEMS-Based Functional Unit Power-Gating: Design, Analysis, and Optimization., and . IEEE Trans. on Circuits and Systems, 60-I (2): 290-302 (2013)Design of energy-efficient, adaptable throughput systems at near/sub-threshold voltage., , and . ACM Trans. Design Autom. Electr. Syst., 18 (1): 3:1-3:23 (2012)Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture., and . Trans. HiPEAC, (2011)24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS., , , , , , , and . ISSCC, page 420-422. IEEE, (2016)Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture., and . HiPEAC, volume 5409 of Lecture Notes in Computer Science, page 278-292. Springer, (2009)