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Free-p: A Practical End-to-End Nonvolatile Memory Protection Mechanism., , , , , and . IEEE Micro, 32 (3): 79-87 (2012)Variable-energy write STT-RAM architecture with bit-wise write-completion monitoring., , , and . ISLPED, page 229-234. IEEE, (2013)Variation-Tolerant Write Completion Circuit for Variable-Energy Write STT-RAM Architecture., , , and . IEEE Trans. VLSI Syst., 24 (4): 1351-1360 (2016)Mini-batch Serialization: CNN Training with Inter-layer Data Reuse., , , , , and . CoRR, (2018)Architectural Support for the Stream Execution Model on General-Purpose Processors., , , , and . PACT, page 3-12. IEEE Computer Society, (2007)Executing irregular scientific applications on stream architectures., , , , and . ICS, page 93-104. ACM, (2007)A QoS-aware memory controller for dynamically balancing GPU and CPU bandwidth use in an MPSoC., , , and . DAC, page 850-855. ACM, (2012)Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures., , and . ISCA, page 237-248. IEEE Computer Society, (2012)Maximizing SIMD resource utilization in GPGPUs with SIMD lane permutation., and . ISCA, page 356-367. ACM, (2013)CLEAN-ECC: high reliability ECC for adaptive granularity memory system., , , , and . MICRO, page 611-622. ACM, (2015)