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A Clocked, Static Circuit Technique for Building Efficient High Frequency Pipelines.

, , , and . Great Lakes Symposium on VLSI, page 182-. IEEE Computer Society, (1997)

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A VLSI chip for the winograd/Prime factor algorithm to compute the discrete Fourier transform., and . IEEE Trans. Acoustics, Speech, and Signal Processing, 34 (4): 979-989 (1986)Architectures for wavelet transforms: A survey., , and . VLSI Signal Processing, 14 (2): 171-192 (1996)Techniques to Reduce the Inherent Limitations of Fully Digit On-Line Arithmetic.. IEEE Trans. Computers, 32 (4): 406-411 (1983)Being Stingy with Multipliers., and . IEEE Trans. Computers, 39 (6): 809-818 (1990)Fully Digit On-Line Networks., and . IEEE Trans. Computers, 32 (4): 402-406 (1983)Design tradeoffs in high speed multipliers and FIR filters., , and . VLSI Design, page 29-32. IEEE Computer Society, (1996)A Simulation Methodology for Software Energy Evaluation., , and . VLSI Design, page 509-510. IEEE Computer Society, (1997)Compound algorithms for digit online arithmetic.. IEEE Symposium on Computer Arithmetic, page 64-71. IEEE Computer Society, (1981)Reducing the number of counters needed for integer multiplication., , and . IEEE Symposium on Computer Arithmetic, page 38-41. IEEE Computer Society, (1995)Optimal Algorithms for Mesh-Connected Parallel Processors with Serial Memories., and . ICPP, page 812-818. IEEE Computer Society Press, (1986)