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Disambiguation of "Shenoy, Narendra V."

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Cell Swapping Based Migration Methodology for Analog and Custom Layouts.

, , , , and . ISQED, page 450-455. IEEE Computer Society, (2008)

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V. Vaikuntanathan

V. Zaverkin

Samaneh Vahid Dastjerdi University of Stuttgart

Data for: Formation of common preferential two-phase displacement pathways in porous media, , and . Dataset, (2024)Related to: Vahid Dastjerdi, S.; Karadimitriou, N.; Hassanizadeh, S. M. & Steeb, H.: Formation of common preferential two-phase displacement pathways in porous media. Water Resources Research (Submitted Jan. 2024).
Data for: Formation of common preferential two-phase displacement pathways in porous media, , and . Dataset, (2024)Related to: Vahid Dastjerdi, S.; Karadimitriou, N.; Hassanizadeh, S. M. & Steeb, H.: Formation of common preferential two-phase displacement pathways in porous media. Water Resources Research (Submitted Jan. 2024).Image processing code for characterization of multiphase flow in porous media, and . Software, (2024)Related to: Vahid Dastjerdi, S.; Karadimitriou, N.; Hassanizadeh, S. M. & Steeb, H.: Experimental evaluation of fluid connectivity in two-phase flow in porous media during drainage. Water Resources Research 58 (2022), e2022WR033451. doi: 10.1029/2022WR033451.

Michael P. Voigt Universität Stuttgart

Wolfgang Vogel

 

Other publications of authors with the same name

Statistical Timing Yield Optimization by Gate Sizing., , and . IEEE Trans. VLSI Syst., 14 (10): 1140-1146 (2006)Emerging markets: design goes global., , , , , , and . DAC, page 195. ACM, (2003)Track assignment: a desirable intermediate step between global routing and detailed routing., , , and . ICCAD, page 59-66. ACM / IEEE Computer Society, (2002)Logic Synthesis for Programmable Gate Arrays., , , , and . DAC, page 620-625. IEEE Computer Society Press, (1990)Efficient implementation of retiming., and . ICCAD, page 226-233. IEEE Computer Society / ACM, (1994)Performance Directed Synthesis for Table Look Up Programmable Gate Arrays., , , and . ICCAD, page 572-575. IEEE Computer Society, (1991)Verifying clock schedules., and . ICCAD, page 124-131. IEEE Computer Society / ACM, (1992)Statistical gate sizing for timing yield optimization., , and . ICCAD, page 1037-1041. IEEE Computer Society, (2005)Advances in Computation of the Maximum of a Set of Gaussian Random Variables., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (8): 1522-1533 (2007)An Efficient External-Memory Implementation of Region Query with Application to Area Routing., , and . ICCD, page 36-41. IEEE Computer Society, (2002)