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CARH: service-oriented architecture for validating system-level designs.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (8): 1458-1474 (2006)

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A New Heuristic for Bad Cycle Detection Using BDDs., , , and . Formal Methods in System Design, 18 (2): 131-140 (2001)Validating Families of Latency Insensitive Protocols., , , and . IEEE Trans. Computers, 55 (11): 1391-1401 (2006)Formal Refinement Checking in a System-level Design Methodology., , , , and . Fundam. Inform., 62 (2): 243-273 (2004)Towards Behavioural Hierarchy Extensions for SystemC., and . FDL, page 361-373. ECSI, (2005)A Functional Programming Framework of Heterogeneous Model of Computation for System Design., , and . FDL, page 586-598. ECSI, (2004)A hybrid framework for design and analysis of fault-tolerant architectures., , , , , and . DATE, page 335-336. European Design and Automation Association, Leuven, Belgium, (2006)A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design., , , and . MEMOCODE, page 39-48. IEEE Computer Society, (2006)Algorithms for power savings., , and . SODA, page 37-46. ACM/SIAM, (2003)Analysis of scheduled Latency insensitive systems with periodic clock calculus., and . HLDVT, page 1-7. IEEE Computer Society, (2009)Nano, quantum, and molecular computing: are we ready for the validation and test challenges?, , , , , and . HLDVT, page 3-7. IEEE Computer Society, (2003)