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A Study of Complex Deep Learning Networks on High-Performance, Neuromorphic, and Quantum Computers.

, , , , , , , , and . JETC, 14 (2): 19:1-19:21 (2018)

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A Secure Integrity Checking System for Nanoelectronic Resistive RAM., , , and . IEEE Trans. VLSI Syst., 27 (2): 416-429 (2019)Design Considerations for Multilevel CMOS/Nano Memristive Memory., , and . JETC, 8 (1): 6:1-6:22 (2012)A Study of Complex Deep Learning Networks on High Performance, Neuromorphic, and Quantum Computers., , , , , , , , and . CoRR, (2017)Memristive Mixed-Signal Neuromorphic Systems: Energy-Efficient Learning at the Circuit-Level., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (1): 125-136 (2018)Nano Meets Security: Exploring Nanoelectronic Devices for Security Applications., , , , , , and . Proceedings of the IEEE, 103 (5): 829-849 (2015)Designs for Ultra-Tiny, Special-Purpose Nanoelectronic Circuits., , , , , and . IEEE Trans. on Circuits and Systems, 54-I (11): 2528-2540 (2007)Memristor Crossbar-Based Neuromorphic Computing System: A Case Study., , , , , and . IEEE Trans. Neural Netw. Learning Syst., 25 (10): 1864-1878 (2014)Neuromorphic computing for temporal scientific data classification., , , , , , , and . NCS, page 2:1-2:6. ACM, (2017)Fabrication and Performance of Hybrid ReRAM-CMOS Circuit Elements for Dynamic Neural Networks., , , , , , , , and . ICONS, page 6:1-6:4. ACM, (2019)Design for Eliminating Operation Specific Power Signatures from Digital Logic., , , , and . ACM Great Lakes Symposium on VLSI, page 111-116. ACM, (2019)