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Disambiguation of "Okamoto, Takuji"

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Systematic reducing of metastable operations in CMOS D flip-flops.

, , , , , and . Systems and Computers in Japan, 31 (3): 20-28 (2000)

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Other publications of authors with the same name

Systematic reducing of metastable operations in CMOS D flip-flops., , , , , and . Systems and Computers in Japan, 31 (3): 20-28 (2000)Timing verification of asynchronous sequential circuits with specifications - A method of reducing state transitions to be verified in detail., , and . Systems and Computers in Japan, 27 (11): 53-63 (1996)A method of shortening metastable operation duration time by the use of feedback., , , , and . Systems and Computers in Japan, 27 (10): 23-32 (1996)The Number of Elements in Minimum Test Set for Locally Exhaustive Testing of Combinational Circuits with Five Outputs., , , , and . IEICE Transactions, 78-D (7): 874-881 (1995)Improvement of Detectability for CMOS Floating Gate Defects in Supply Current Test., , , , and . Asian Test Symposium, page 406-411. IEEE Computer Society, (2003)Testing for the programming circuit of LUT-based FPGAs., , , , and . Asian Test Symposium, page 242-247. IEEE Computer Society, (1997)CMOS Floating Gate Defect Detection Using I DDQ Test with DC Power Supply., , , , and . Asian Test Symposium, page 417-422. IEEE Computer Society, (2002)Universal test complexity of field-programmable gate arrays., , , , and . Asian Test Symposium, page 259-265. IEEE Computer Society, (1995)Synthesis of four-phase asynchronous control circuits from pipeline dependency graphs., , and . ASP-DAC, page 425-430. ACM, (2001)Model analysis of coronary hemodynamics incorporating autoregulation., , , , , and . Systems and Computers in Japan, 35 (14): 21-31 (2004)