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A Unified Framework for Design Validation and Manufacturing Test.

D. Moundanos, J. Abraham, and Y. Hoskote. ITC, page 875-884. IEEE Computer Society, (1996)

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Abstraction Techniques for Validation Coverage Analysis and Test Generation.D. Moundanos, J. Abraham, and Y. Hoskote. IEEE Trans. Computers, 47 (1): 2-14 (1998)Abstraction of data path registers for multilevel verification of large circuits.Y. Hoskote, J. Moondanos, J. Abraham, and D. Fussell. Great Lakes Symposium on VLSI, page 11-14. IEEE, (1994)A Unified Framework for Design Validation and Manufacturing Test.D. Moundanos, J. Abraham, and Y. Hoskote. ITC, page 875-884. IEEE Computer Society, (1996)Verification of Circuits Described in VHDL through Extraction of Design Intent.Y. Hoskote, J. Moondanos, J. Abraham, and D. Fussell. VLSI Design, page 417-420. IEEE Computer Society, (1994)Coverage Estimation for Symbolic Model Checking.Y. Hoskote, T. Kam, P. Ho, and X. Zhao. DAC, page 300-305. ACM Press, (1999)Automated verification of temporal properties specified as state machines in VHDL.Y. Hoskote, J. Abraham, and D. Fussell. Great Lakes Symposium on VLSI, page 100-105. IEEE Computer Society, (1995)Probabilistic Evaluation of On-Line Checks in Fault-Tolerant Multiprocessor Systems.V. Nair, Y. Hoskote, and J. Abraham. IEEE Trans. Computers, 41 (5): 532-541 (1992)Automatic verification of implementations of large circuits against HDL specifications.Y. Hoskote, J. Abraham, D. Fussell, and J. Moondanos. IEEE Trans. on CAD of Integrated Circuits and Systems, 16 (3): 217-228 (1997)Verification of transient response of linear analog circuits.A. Balivada, Y. Hoskote, and J. Abraham. VTS, page 42-47. IEEE Computer Society, (1995)Guest Editors' Introduction: Tackling Key Problems in NoCs.Y. Hoskote, R. Marculescu, and L. Peh. IEEE Design & Test of Computers, 25 (5): 400-401 (2008)

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A Unified Framework for Design Validation and Manufacturing Test.

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Disambiguation of "Hoskote, Yatin Vasant"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Unified Framework for Design Validation and Manufacturing Test.

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A Unified Framework for Design Validation and Manufacturing Test.