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Modeling, simulation, and design of a multi-mode 2-10 Gb/sec fully adaptive serial link system., , , , , , , , , and 3 other author(s). CICC, page 709-716. IEEE, (2005)Guest Editorial for Special Issue on High-Performance Multichip Interconnections., , and . IEEE Trans. on Circuits and Systems, 57-II (5): 317-318 (2010)Why Analog-to-Information Converters Suffer in High-Bandwidth Sparse Signal Applications., , , and . IEEE Trans. on Circuits and Systems, 60-I (9): 2273-2284 (2013)Model Predictive Control Equalization for High-Speed I/O Links., , and . IEEE Trans. on Circuits and Systems, 61-I (2): 371-381 (2014)High-Speed Serial Links: Design Trends and Challenges, invited.. IWSOC, page 514. IEEE Computer Society, (2005)Design of "green" high-performance processor circuits., , , , , , , and . ISSCC, page 518-519. IEEE, (2011)DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling., , , , , , , and . NOCS, page 201-210. IEEE Computer Society, (2012)An Energy-Efficient Equalized Transceiver for RC-Dominant Channels., and . J. Solid-State Circuits, 45 (6): 1186-1197 (2010)Analog Multi-Tone Signaling for High-Speed Backplane Electrical Links., , , and . GLOBECOM, IEEE, (2006)A monolithically-integrated chip-to-chip optical link in bulk CMOS., , , , , , , , , and 12 other author(s). VLSIC, page 1-2. IEEE, (2014)