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Disambiguation of "Tan, Sheldon X.-D."

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Parallel Thermal Analysis of 3-D Integrated Circuits With Liquid Cooling on CPU-GPU Platforms.

, , , , , and . IEEE Trans. VLSI Syst., 23 (3): 575-579 (2015)

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Xiangyin Tan University of Stuttgart

D. Marino

Chensheng Xu University of Stuttgart

Yifan Xie University of Stuttgart

Boyu Xian University of Stuttgart

 

Other publications of authors with the same name

Fast analysis of nontree-clock network considering environmental uncertainty by parameterized and incremental macromodeling., , and . ASP-DAC, page 379-384. IEEE, (2009)Architecture-level thermal behavioral characterization for multi-core microprocessors., , and . ASP-DAC, page 456-461. IEEE, (2008)Fast Decoupling Capacitor Budgeting for Power/Ground Network Using Random Walk Approach., , , , , and . ASP-DAC, page 751-756. IEEE Computer Society, (2007)Time-domain performance bound analysis for analog and interconnect circuits considering process variations., , , and . ASP-DAC, page 455-460. IEEE, (2014)Efficient power modeling and software thermal sensing for runtime temperature monitoring., , , , and . ACM Trans. Design Autom. Electr. Syst., 12 (3): 25:1-25:29 (2007)Performance bound analysis of analog circuits in frequency- and time-domain considering process variations., , , , and . ACM Trans. Design Autom. Electr. Syst., 19 (1): 6:1-6:22 (2013)Parameterized architecture-level dynamic thermal models for multicore microprocessors., , , and . ACM Trans. Design Autom. Electr. Syst., 15 (2): 16:1-16:22 (2010)Fast Analysis of On-Chip Power Grid Circuits by Extended Truncated Balanced Realization Method., and . IEICE Transactions, 92-A (12): 3061-3069 (2009)Physics-Based Electromigration Models and Full-Chip Assessment for Power Grid Networks., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 35 (11): 1848-1861 (2016)GPU-based Ising Computing for Solving Balanced Min-Cut Graph Partitioning Problem., , and . CoRR, (2019)