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Disambiguation of "Villamón, Francisco Gilabert"

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Deterministic versus Adaptive Routing in Fat-Trees.

, , , , and . IPDPS, page 1-8. IEEE, (2007)

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Francisco Costa Garcia University of Stuttgart

Dr. Preston Francisco Rodrigues University of Stuttgart

 

Other publications of authors with the same name

EST2uni: an open, parallel tool for automated EST analysis and database creation, with a data mining web interface and microarray expression data integration., , , , , and . BMC Bioinformatics, (2008)Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology., , , , and . NoCArc@MICRO, page 37-42. ACM, (2010)Design space exploration and performance evaluation at Electronic System Level for NoC-based MPSoC., and . ICCAD, page 336-339. IEEE, (2010)Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints., , , , , , , and . DATE, page 562-565. IEEE, (2009)Networks-on-Chip: an Interconnect Fabric for Multiprocessor Systems-on-Chip., , , and . Embedded Systems Design and Verification, CRC Press, (2009)Deterministic versus Adaptive Routing in Fat-Trees., , , , and . IPDPS, page 1-8. IEEE, (2007)Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework., , , , , , and . NOCS, page 107-116. IEEE Computer Society, (2008)On the Influence of the Selection Function on the Performance of Fat-Trees., , , and . Euro-Par, volume 4128 of Lecture Notes in Computer Science, page 864-873. Springer, (2006)Improved Utilization of NoC Channel Bandwidth by Switch Replication for Cost-Effective Multi-processor Systems-on-Chip., , , and . NOCS, page 165-172. IEEE Computer Society, (2010)Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints., , , , , and . CISIS, page 681-687. IEEE Computer Society, (2009)