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Rapid Prototyping for Configurable System-on-a-Chip Platforms: A Simulation Based Approach.

, , , , and . VLSI Design, page 577-. IEEE Computer Society, (2004)

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Automated assertion transformation across multiple abstraction levels.. Technical University Munich, (2009)IP Library For Temporal SystemC Assertions., , , , and . FDL, page 301-309. ECSI, (2006)Memory Models for the Formal Verification of Assembler Code Using Bounded Model Checking., , , and . ISORC, page 129-135. IEEE Computer Society, (2004)Requirements and Concepts for Transaction Level Assertion Refinement., , , and . IESS, volume 231 of IFIP Advances in Information and Communication Technology, page 1-14. Springer, (2007)Model reduction techniques for the formal verification of hardware dependent software., , , , and . HLDVT, page 148-153. IEEE Computer Society, (2010)TLM+ modeling of embedded HW/SW systems., , , , and . DATE, page 75-80. IEEE, (2010)Specification Language for Transaction Level Assertions., , , , and . HLDVT, page 77-84. IEEE Computer Society, (2006)Interactive presentation: Implementation of a transaction level assertion framework in SystemC., , , , and . DATE, page 894-899. EDA Consortium, San Jose, CA, USA, (2007)Case Study on Transaction Level Modeling., , , and . FDL, page 209-215. ECSI, (2006)Interactive presentation: Impact of description language, abstraction layer, and value representation on simulation performance., , , , , and . DATE, page 767-772. EDA Consortium, San Jose, CA, USA, (2007)