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Disambiguation of "Sapatnekar, Sachin S."

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Control synthesis and delay sensor deployment for efficient ASV designs.

, , and . ICCAD, page 64. ACM, (2016)

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S. Schumann

S. Seemann

S. Wartzack

Boettinger S

S. Toro

 

Other publications of authors with the same name

Capturing the Effect of Crosstalk on Delay.. VLSI Design, page 364-369. IEEE Computer Society, (2000)Wiresizing with Buffer Placement and Sizing for Power-Delay Tradeoffs., and . VLSI Design, page 346-351. IEEE Computer Society, (1996)A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic., , and . ICCD, page 276-281. (1998)Physical Design for Three-Dimensional Circuits., and . Handbook of Algorithms for Physical Design Automation, Auerbach Publications, (2008)CATALYST: planning layer directives for effective design closure., , , , , and . DATE, page 1873-1878. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Improving STT-MRAM density through multibit error correction., , , and . DATE, page 1-6. European Design and Automation Association, (2014)An integrated algorithm for combined placement and libraryless technology mapping., and . ICCAD, page 102-106. IEEE Computer Society, (1999)Timing-driven partitioning for two-phase domino and mixed static/domino implementations., and . ICCAD, page 107-110. IEEE Computer Society, (1999)A Timing-Constrained Algorithm for Simultaneous Global Routing of Multiple Nets., and . ICCAD, page 99-103. IEEE Computer Society, (2000)Fast Analysis and Optimization of Power/Ground Networks., , and . ICCAD, page 477-480. IEEE Computer Society, (2000)