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Towards performance analysis of SDFGs mapped to shared-bus architectures using model-checking.

, , , and . DATE, page 1167-1172. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication., , , and . RAPIDO, page 6. ACM, (2017)A Hypervisor Architecture for Low-Power Real-Time Embedded Systems., , , , , , and . DSD, page 252-259. IEEE Computer Society, (2018)Probabilistic State-Based RT-Analysis of SDFGs on MPSoCs with Shared Memory Communication., , , , and . DATE, page 1715-1720. IEEE, (2019)Simulink-Modell-Übersetzung in synchrone Datenflussgraphen., and . MBMV, page 89-101. Albert-Ludwigs-Universität Freiburg, (2016)SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems., , , , , , , , , and 8 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, (2017)State-based real-time analysis of SDF applications on MPSoCs with shared communication resources., , , and . Journal of Systems Architecture - Embedded Systems Design, 61 (9): 486-509 (2015)Experimental Evaluation of Scenario Aware Synchronous Data Flow based Power Management., , , , and . COINS, page 80-85. ACM, (2019)SAFEPOWER: Application of Power Management Techniques in SoCs for Safety-Relevant Systems., , , , and . COINS, page 104-109. ACM, (2019)A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs., and . COINS, page 86-91. ACM, (2019)Exploiting Segregation in Bus-Based MPSoCs to Improve Scalability of Model-Checking-Based Performance Analysis for SDFAs., , , and . IESS, volume 403 of IFIP Advances in Information and Communication Technology, page 205-217. Springer, (2013)