Author of the publication

Statistical observations of NBTI-induced threshold voltage shifts on small channel-area devices.

, , , , and . ISQED, page 306-311. IEEE, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Ochi, Hiroyuki
add a person with the name Ochi, Hiroyuki
 

Other publications of authors with the same name

Hot-swapping architecture with back-biased testing for mitigation of permanent faults in functional unit array., , , , , and . DATE, page 535-540. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Experimental validation of minimum operating-voltage-estimation for low supply voltage circuits., , , and . ISQED, page 428-433. IEEE, (2014)A Localization Scheme for Sensor Networks based onWireless Communication with Anchor Groups., , and . ICPADS (1), page 299-305. IEEE Computer Society, (2005)Selectable grained reconfigurable architecture (SGRA) and its design automation., , , and . SoCC, page 196-201. IEEE, (2017)Fast and memory-efficient GPU implementations of krylov subspace methods for efficient power grid analysis., , , and . ACM Great Lakes Symposium on VLSI, page 95-100. ACM, (2013)Autonomous Repair Fault Tolerant Dynamic Reconfigurable Device., , , , and . IEICE Transactions, 91-A (12): 3612-3621 (2008)Network Processor for High-Speed Network and Quick Programming., , , , and . Journal of Circuits, Systems, and Computers, 16 (1): 65-79 (2007)Efficient memory architecture for JPEG2000 entropy codec., , , , , and . ISCAS, IEEE, (2006)An Asynchronous IEEE-754-standard Single-precision Floating-point Divider for FPGA., , and . IPSJ Trans. System LSI Design Methodology, (2009)A 16-bit redundant binary multiplier using low-power pass-transistor logic SPL., , , , , and . ASP-DAC, page 33-34. ACM, (2000)