Author of the publication

A 4.5 mW CT Self-Coupled ΔΣ Modulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation.

, , , , , and . J. Solid-State Circuits, 50 (12): 2870-2879 (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 64-fJ/Conv.-Step Continuous-Time Sigma Delta Modulator in 40-nm CMOS Using Asynchronous SAR Quantizer and Digital Delta Sigma Truncator., , , and . J. Solid-State Circuits, 48 (11): 2637-2648 (2013)A Fuel-Efficient Route Plan App Based on Game Theory., , , , and . IoTaaS, volume 246 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, page 126-135. Springer, (2017)A 4.5 mW CT Self-Coupled ΔΣ Modulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation., , , , , and . J. Solid-State Circuits, 50 (12): 2870-2879 (2015)Fuel Consumption Estimation System and Method with Lower Cost., , , , and . Symmetry, 9 (7): 105 (2017)15.2 A 4.5mW CT self-coupled ΔΣ modulator with 2.2MHz BW and 90.4dB SNDR using residual ELD compensation., , , , , and . ISSCC, page 1-3. IEEE, (2015)A 23 mW, 73 dB Dynamic Range, 80 MHz BW Continuous-Time Delta-Sigma Modulator in 20 nm CMOS., , , and . J. Solid-State Circuits, 50 (4): 908-919 (2015)A 23mW, 73dB dynamic range, 80MHz BW continuous-time delta-sigma modulator in 20nm CMOS., , , and . VLSIC, page 1-2. IEEE, (2014)A GPS/Galileo SoC with adaptive in-band blocker cancellation in 65nm CMOS., , , , , , , , , and 4 other author(s). ISSCC, page 462-464. IEEE, (2011)