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Sibling-substitution-based BDD minimization using don't cares.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 19 (1): 44-55 (2000)

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Sufficient conditions for correct gate-level speed-independent circuits., , and . ASYNC, page 33-43. IEEE, (1994)Mechanically Checking a Lemma Used in an Automatic Verification Tool., and . FMCAD, volume 1166 of Lecture Notes in Computer Science, page 362-376. Springer, (1996)Symbolic Model Checking with Partitioned Transistion Relations., , and . VLSI, volume A-1 of IFIP Transactions, page 49-58. North-Holland, (1991)Efficient verification of determinate speed-independent circuits., , and . ICCAD, page 261-267. IEEE Computer Society / ACM, (1993)Verifying Liveness Properties by Verifying Safety Properties.. CAV, volume 531 of Lecture Notes in Computer Science, page 224-232. Springer, (1990)Using BDDs to Verify Multipliers.. DAC, page 408-412. ACM, (1991)Efficient validity checking for processor verification., , and . ICCAD, page 2-6. IEEE Computer Society / ACM, (1995)Fair Mutual Exclusion with Unfair P and V Operations., and . Inf. Process. Lett., 21 (2): 97-100 (1985)Symbolic Model Checking: 10^20 States and Beyond, , , , and . Inf. Comput., 98 (2): 142-170 (June 1992)Constraints specification at higher levels of abstraction., , , , , and . HLDVT, page 129-133. IEEE Computer Society, (2001)