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Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture.

, , , , , and . FPT, page 421-424. IEEE, (2004)

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An Approximate Maximum Common Subgraph Algorithm for Large Digital Circuits., , , , and . DSD, page 699-705. IEEE Computer Society, (2010)Fast, Accurate and Detailed NoC Simulations., , and . NOCS, page 323-332. IEEE Computer Society, (2007)An Energy-Efficient Reconfigurable Circuit-Switched Network-on-Chip., , , and . IPDPS, IEEE Computer Society, (2005)Efficient architectures for streaming applications., , , , and . Dynamically Reconfigurable Architectures, volume 06141 of Dagstuhl Seminar Proceedings, Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany, (2006)Providing QoS Guarantees in a NoC by Virtual Channel Reservation., , , and . ARC, volume 3985 of Lecture Notes in Computer Science, page 299-310. Springer, (2006)Non-Power-of-Two FFTs: Exploring the Flexibility of the Montium TP., , and . Int. J. Reconfig. Comp., (2009)Run-time assignment of tasks to multiple heterogeneous processors, , , , , and . 5th PROGRESS Symposium on Embedded Systems, page 185--192. STW Technology Foundation, (2004)Energy-Efficient NoC for Best-Effort Communication., , and . FPL, page 197-202. IEEE, (2005)The Chameleon Architecture for Streaming DSP Applications., , , , , and . EURASIP J. Emb. Sys., (2007)Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture., , , , , and . FPT, page 421-424. IEEE, (2004)