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DFT for extremely low cost test of mixed signal SOCs with integrated RF and power management.

, , , , , , and . ITC, page 1-10. IEEE Computer Society, (2011)

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Session Abstract.. VTS, page 86-87. IEEE Computer Society, (2006)A framework to evaluate test tradeoffs in embedded core based systems-case study on TI's TMS320C27xx., , , , and . ITC, page 417-425. IEEE Computer Society, (2000)DFT for Test Optimisations in a Complex Mixed-Signal SOC - Case Study on TI's TNETD7300 ADSL Modem Device., and . ITC, page 773-782. IEEE Computer Society, (2004)State Assignment for Optimal Design of Monitored Self-Checking Sequential Circuits., , and . VLSI Design, page 15-20. IEEE Computer Society, (1993)Evaluation of Entropy Driven Compression Bounds on Industrial Designs., , , , and . ATS, page 13-18. IEEE Computer Society, (2008)Low Power Test for Nanometer System-on-Chips (SoCs)., , and . J. Low Power Electronics, 4 (1): 81-100 (2008)Reduced overhead soft error mitigation using error control coding techniques., , and . IOLTS, page 163-168. IEEE Computer Society, (2011)Methodology for low power test pattern generation using activity threshold control logic., , and . ICCAD, page 526-529. IEEE Computer Society, (2007)Modeling Techniques for Formal Verification of BIST Controllers and Their Integration into SOC Designs., and . VLSI Design, page 364-372. IEEE Computer Society, (2007)Test Techniques and Trade-offs for Embedded Cores and Systems.. VLSI Design, page 5. IEEE Computer Society, (2000)