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Analytical Performance Modeling and Validation of Intel's Xeon Phi Architecture.

S. Chunduri, P. Balaprakash, V. Morozov, V. Vishwanath, and K. Kumaran. Conf. Computing Frontiers, page 247-250. ACM, (2017)

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The first functional demonstration of optical virtual concatenation as a technique for achieving Terabit networking.A. Hirano, L. Renambot, B. Jeong, J. Leigh, A. Verlo, V. Vishwanath, R. Singh, J. Aguilera, A. Johnson, T. DeFanti and 10 other author(s). Future Generation Comp. Syst., 22 (8): 876-883 (2006)Proactive Support for Large-Scale Data Exploration.M. Hereld, T. Malik, and V. Vishwanath. IPDPS Workshops, page 2025-2034. IEEE, (2013)Profiling transport performance for big data transfer over dedicated channels.D. Yun, C. Wu, N. Rao, B. Settlemyer, J. Lothian, R. Kettimuthu, and V. Vishwanath. ICNC, page 858-862. IEEE Computer Society, (2015)Vol-a-Tile - A Tool for Interactive Exploration of Large Volumetric Data on Scalable Tiled Displays.N. Schwarz, S. Venkataraman, L. Renambot, N. Krishnaprasad, V. Vishwanath, J. Leigh, A. Johnson, G. Kent, and A. Nayak. IEEE Visualization, page 19. IEEE Computer Society, (2004)A Benchmarking Study to Evaluate Apache Spark on Large-Scale Supercomputers.G. Thiruvathukal, C. Christensen, X. Jin, F. Tessier, and V. Vishwanath. CoRR, (2019)Analytical Performance Modeling and Validation of Intel's Xeon Phi Architecture.S. Chunduri, P. Balaprakash, V. Morozov, V. Vishwanath, and K. Kumaran. Conf. Computing Frontiers, page 247-250. ACM, (2017)PoLiMEr: An Energy Monitoring and Power Limiting Interface for HPC Applications.I. Marincic, V. Vishwanath, and H. Hoffmann. E2SC@SC, page 7:1-7:8. ACM, (2017)Multi-application inter-tile synchronization on ultra-high-resolution display walls.S. Nam, S. Deshpande, V. Vishwanath, B. Jeong, L. Renambot, and J. Leigh. MMSys, page 145-156. ACM, (2010)Early Experience on the Blue Gene/Q Supercomputing System.V. Morozov, K. Kumaran, V. Vishwanath, J. Meng, and M. Papka. IPDPS, page 1229-1240. IEEE Computer Society, (2013)Parallel distributed, GPU-accelerated, advanced lighting calculations for large-scale volume visualization.M. Shih, S. Rizzi, J. Insley, T. Uram, V. Vishwanath, M. Hereld, M. Papka, and K. Ma. LDAV, page 47-55. IEEE Computer Society, (2016)

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Disambiguation of "Vishwanath, Venkatram"

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Analytical Performance Modeling and Validation of Intel's Xeon Phi Architecture.

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Disambiguation of "Vishwanath, Venkatram"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Analytical Performance Modeling and Validation of Intel's Xeon Phi Architecture.

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Analytical Performance Modeling and Validation of Intel's Xeon Phi Architecture.