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Disambiguation of "Ren, Jihong"

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Surfing Interconnect.

, and . ASYNC, page 98-106. IEEE Computer Society, (2006)

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Weibo Ren University of Stuttgart

Anja Rentz University of Stuttgart

Dr. -Ing. Jörg Renner University of Stuttgart

Sylvia Rendsburg University of Stuttgart

Ulrich Rentschler University of Stuttgart

 

Other publications of authors with the same name

Near-Optimal Equalizer and Timing Adaptation for I/O Links Using a BER-Based Metric., , , , , , , , , and . J. Solid-State Circuits, 43 (9): 2144-2156 (2008)A unified optimization framework for equalization filter synthesis., and . DAC, page 638-643. ACM, (2005)Synthesizing optimal filters for crosstalk-cancellation for high-speed buses., and . DAC, page 592-597. ACM, (2003)Characterization of random decision errors in clocked comparators., , , and . CICC, page 691-694. IEEE, (2008)Stochastic steady-state and AC analyses of mixed-signal systems., , and . DAC, page 376-381. ACM, (2009)Surfing Interconnect., and . ASYNC, page 98-106. IEEE Computer Society, (2006)A Signal Integrity Test Bed for PCB Buses., and . ICCD, page 132-137. IEEE Computer Society, (2004)A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology., , , , , , , , , and 4 other author(s). J. Solid-State Circuits, 50 (4): 814-827 (2015)A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering., , , , , , , , , and 4 other author(s). VLSIC, page 1-2. IEEE, (2014)A 40-Gb/s serial link transceiver in 28-nm CMOS technology., , , , , , , , , and 4 other author(s). VLSIC, page 1-2. IEEE, (2014)