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Disambiguation of "Hijaz, Farrukh"

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LDAC: Locality-Aware Data Access Control for Large-Scale Multicore Cache Hierarchies.

, , , , and . ACM Trans. Archit. Code Optim., 13 (4): 37:1-37:28 (2016)

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Sara Hijazi University of Stuttgart

 

Other publications of authors with the same name

CRONO: A Benchmark Suite for Multithreaded Graph Algorithms Executing on Futuristic Multicores., , , and . IISWC, page 44-55. IEEE Computer Society, (2015)Efficient parallel packet processing using a shared memory many-core processor with hardware support to accelerate communication., , , and . NAS, page 122-129. IEEE Computer Society, (2015)Low-Latency Mechanisms for Near-Threshold Operation of Private Caches in Shared Memory Multicores., , and . MICRO Workshops, page 68-73. IEEE Computer Society, (2012)Towards efficient dynamic data placement in NoC-based multicores., , and . ICCD, page 369-376. IEEE Computer Society, (2013)Locality-aware data replication in the last-level cache for large scale multicores., , , , and . The Journal of Supercomputing, 72 (2): 718-752 (2016)A private level-1 cache architecture to exploit the latency and capacity tradeoffs in multicores operating at near-threshold voltages., , and . ICCD, page 85-92. IEEE Computer Society, (2013)LDAC: Locality-Aware Data Access Control for Large-Scale Multicore Cache Hierarchies., , , , and . ACM Trans. Archit. Code Optim., 13 (4): 37:1-37:28 (2016)ARCc: A case for an architecturally redundant cache-coherence architecture for large multicores., , , , , and . ICCD, page 411-418. IEEE Computer Society, (2011)M-MAP: Multi-Factor Memory Authentication for Secure Embedded Processors., , , , , , , and . IACR Cryptology ePrint Archive, (2015)NUCA-L1: A Non-Uniform Access Latency Level-1 Cache Architecture for Multicores Operating at Near-Threshold Voltages., and . TACO, 11 (3): 29:1-29:28 (2014)