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Static Mapping of Applications on Heterogeneous Multi-Core Platforms Combining Logic-Based Benders Decomposition with Integer Linear Programming.

, , , and . ACM Trans. Design Autom. Electr. Syst., 23 (2): 26:1-26:24 (2018)

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Optimising the SHA-512 cryptographic hash function on FPGAs., , , and . IET Computers & Digital Techniques, 8 (2): 70-82 (2014)A method for partitioning applications in hybrid reconfigurable architectures., , , , and . Design Autom. for Emb. Sys., 10 (1): 27-47 (2005)Power aware data type refinement on the HIPERLAN/2., , , , , and . ICECS, page 216-219. IEEE, (2003)An reconfigurable multiplier in GF(2m) for elliptic curve cryptosystem., , and . ICECS, page 699-702. IEEE, (2003)A high performance data-path to accelerate DSP kernels., , , , and . ICECS, page 495-498. IEEE, (2004)Accelerating DSP Applications on a Mixed Granularity Platform with a New Reconfigurable Coarse-Grain Data-Path., , , , and . FCCM, page 275-276. IEEE Computer Society, (2004)On the Development of Totally Self-checking Hardware Design for the SHA-1 Hash Function., , , , and . SECRYPT, page 270-275. SciTePress, (2012)A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms., , , , and . IPDPS, IEEE Computer Society, (2005)A high-performance data path for synthesizing DSP kernels., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (6): 1154-1162 (2006)A Novel Constant-Time Fault-Secure Binary Counter., , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 742-749. Springer, (2004)