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Two-Port PCM Architecture for Network Processing., , , , und . IEEE Trans. VLSI Syst., 23 (10): 2135-2148 (2015)E3R: Energy Efficient Error Recovery for Multi/Triple-Level Cell Non-volatile Memories., und . VLSI Design, Seite 373-378. IEEE Computer Society, (2016)Closed-Form Simulation and Robustness Models for SEU-Tolerant Design.. VTS, Seite 327-333. IEEE Computer Society, (2005)Large power grid analysis using domain decomposition., , , und . DATE, Seite 27-32. European Design and Automation Association, Leuven, Belgium, (2006)Tunable Transient Filters for Soft Error Rate Reduction in Combinational Circuits., , und . European Test Symposium, Seite 179-184. IEEE Computer Society, (2008)ACME: advanced counter mode encryption for secure non-volatile memories., und . DAC, Seite 86:1-86:6. ACM, (2018)SECRET: smartly EnCRypted energy efficient non-volatile memories., , und . DAC, Seite 166:1-166:6. ACM, (2016)Technology exploration for graphene nanoribbon FETs., , , und . DAC, Seite 272-277. ACM, (2008)Graphene nanoribbon FETs: technology exploration and CAD., und . ICCAD, Seite 412-415. IEEE Computer Society, (2008)Multi-port FinFET SRAM design., , und . ACM Great Lakes Symposium on VLSI, Seite 293-298. ACM, (2013)