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Fast parallel prefix logic circuits for n2n round-robin arbitration., and . Microelectronics Journal, 43 (8): 573-581 (2012)Gravitational pose estimation., , and . Computers & Electrical Engineering, 36 (6): 1165-1180 (2010)Defect-Aware Nanocrossbar Logic Mapping through Matrix Canonization Using Two-Dimensional Radix Sort., , and . JETC, 7 (3): 12:1-12:16 (2011)Synthesis of clock trees for Sampled-Data Analog IC blocks., , , , , , , , , and . EWDTS, page 1-4. IEEE Computer Society, (2013)An area efficient real time implementation of dual tree complex wavelet transform in field programmable gate arrays., , , , , and . BIBE, page 1-5. IEEE Computer Society, (2015)Enabling difference-based dynamic partial self reconfiguration for large differences., , , , and . IDT, page 1-6. IEEE, (2013)FPGA design security with time division multiplexed PUFs., , , and . HPCS, page 608-614. IEEE, (2010)Lossless Look-Up Table Compression for Hardware Implementation of Transcendental Functions., , and . VLSI-SoC, page 52-57. IEEE, (2019)HM-Net: A Regression Network for Object Center Detection and Tracking on Wide Area Motion Imagery., , , and . IEEE Access, (2022)A Fast Circuit Topology for Finding the Maximum of N k-bit Numbers., , , and . IEEE Symposium on Computer Arithmetic, page 59-66. IEEE Computer Society, (2013)