Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Fast Scheduling Algorithm for Low Power Design., and . Journal of Circuits, Systems, and Computers, 14 (4): 735-756 (2005)A Reconfiguration Technique for Reliable VLSI DSP Array Processors., , and . Journal of Circuits, Systems, and Computers, 2 (3): 281-304 (1992)Smart-flooding: A novel scheme for fault-tolerant NoCs., and . SoCC, page 259-262. IEEE, (2009)&thetas;(logN) architectures for RNS arithmetic decoding., , and . IEEE Symposium on Computer Arithmetic, page 202-209. IEEE, (1989)Low-Power Clocked-Pseudo-NMOS Flip-Flop for Level Conversion in Dual Supply Systems., , , , , , , and . IEEE Trans. VLSI Syst., 17 (9): 1196-1202 (2009)An Efficient Adaptive High Speed Manipulation Architecture for Fast Variable Padding Frequency Domain Motion Estimation., , , and . IEEE Trans. VLSI Syst., 19 (7): 1239-1248 (2011)Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style., , and . IEEE Trans. VLSI Syst., 14 (12): 1309-1321 (2006)Standardization of cognitive radio networking: a comprehensive survey., and . Annales des Télécommunications, 70 (11-12): 465-477 (2015)Systematic Algorithm Mapping for Multidimensional Systolic Arrays., and . J. Parallel Distrib. Comput., 7 (2): 368-382 (1989)A Graph-Based Approach to the Synthesis of Multi-Chip Module Architectures., , and . VLSI Design, page 192-197. IEEE Computer Society, (1996)