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Disambiguation of "Tzeng, Chao-Wen"

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Die-to-Die Clock Synchronization for 3-D IC Using Dual Locking Mechanism.

, , , , and . IEEE Trans. on Circuits and Systems, 60-I (4): 908-917 (2013)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Dr. -Ing. Christoph Wenzel University of Stuttgart

Tizian Wenzel University of Stuttgart

Deep and greedy kernel methods : algorithms, analysis and applications. Universität Stuttgart, Stuttgart, Dissertation, (2023)

Ingeborg Wenger University of Stuttgart

Dr. rer. nat. Tim Wendlandt University of Stuttgart

Florian Wenz University of Stuttgart

 

Other publications of authors with the same name

Layout-Based Defect-Driven Diagnosis for Intracell Bridging Defects., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (5): 764-769 (2009)Two-Gear Low-Power Scan Test., and . ATS, page 337-342. IEEE Computer Society, (2008)Cell-Based Process Resilient Multiphase Clock Generation., , and . IEEE Trans. VLSI Syst., 21 (12): 2348-2352 (2013)UMC-Scan Test Methodology: Exploiting the Maximum Freedom of Multicasting., and . IEEE Design & Test of Computers, 25 (2): 132-140 (2008)Split-Masking: An Output Masking Scheme for Effective Compound Defect Diagnosis in Scan Architecture With Test Compression., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (5): 834-839 (2010)QC-Fill: Quick-and-Cool X-Filling for Multicasting-Based Scan Test., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (11): 1756-1766 (2009)Cyclic-MPCG: Process-resilient and super-resolution multi-phase clock generation by exploiting the cyclic property., , , , and . VLSI-DAT, page 1-4. IEEE, (2012)AC-Plus Scan Methodology for Small Delay Testing and Characterization., , , , , , , , , and 2 other author(s). IEEE Trans. VLSI Syst., 21 (2): 329-341 (2013)Case study of yield learning through in-house flow of volume diagnosis., , , , and . VLSI-DAT, page 1-4. IEEE, (2013)Case study of process and design performance debugging with Digital Speed Sensor., , , and . VLSI-DAT, page 1-4. IEEE, (2015)