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Pipelined SHA-3 Implementations on FPGA: Architecture and Performance Analysis.

, , and . CS2@HiPEAC, page 13-18. ACM, (2015)

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Ultra High Speed SHA-256 Hashing Cryptographic Module for IPSec Hardware/Software Codesign., , , , , and . SECRYPT, page 309-313. SciTePress, (2010)Evolution of the e-Museum Concept through Exploitation of Cryptographic Algorithms., , , and . EuroMed, volume 7616 of Lecture Notes in Computer Science, page 291-300. Springer, (2012)On the exploitation of a high-throughput SHA-256 FPGA design for HMAC., , , , and . TRETS, 5 (1): 2:1-2:28 (2012)High-performance FPGA implementations of the cryptographic hash function JH., , , and . IET Computers & Digital Techniques, 7 (1): 29-40 (2013)A Systematic Flow for Developing Totally Self-Checking Architectures for SHA-1 and SHA-2 Cryptographic Hash Families., , , , and . Journal of Circuits, Systems, and Computers, (2013)Assessing Students' Learning in MIS using Concept Mapping., , and . JISE, 20 (4): 419-430 (2009)Novel high throughput implementation of SHA-256 hash function through pre-computation technique., , , and . ICECS, page 1-4. IEEE, (2005)Designs and comparisons of authentication modules for IPSec in configurable and extensible embedded processor., , , and . ICECS, page 243-246. IEEE, (2010)An Intelligent Transportation System for Accident Risk Index Quantification., , and . ICEIS (1), page 318-321. SciTePress, (2012)On the Development of Totally Self-checking Hardware Design for the SHA-1 Hash Function., , , , and . SECRYPT, page 270-275. SciTePress, (2012)