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Studying interactions between prefetching and cache line turnoff., , and . ASP-DAC, page 545-548. ACM Press, (2005)An energy saving strategy based on adaptive loop parallelization., , and . DAC, page 195-200. ACM, (2002)An integer linear programming based approach for parallelizing applications in On-chip multiprocessors., , and . DAC, page 703-708. ACM, (2002)vEC: virtual energy counters., , , , , and . PASTE, page 28-31. ACM, (2001)Generating physical addresses directly for saving instruction TLB energy., , , , and . MICRO, page 185-196. ACM/IEEE Computer Society, (2002)Compiler-directed scratch pad memory optimization for embedded multiprocessors., , , and . IEEE Trans. VLSI Syst., 12 (3): 281-287 (2004)Reducing Data TLB Power via Compiler-Directed Address Generation., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (2): 312-324 (2007)Compiler-directed physical address generation for reducing dTLB power., , , and . ISPASS, page 161-168. IEEE Computer Society, (2004)Quasidynamic Layout Optimizations for Improving Data Locality., and . IEEE Trans. Parallel Distrib. Syst., 15 (11): 996-1011 (2004)Leakage Energy Management in Cache Hierarchies., , , , , , and . IEEE PACT, page 131-140. IEEE Computer Society, (2002)