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A property language for the specification of hardware-dependent embedded system software., , , , and . FDL, page 1-8. IEEE, (2014)Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning., , , , and . ICCD, page 350-353. IEEE Computer Society, (2004)STABLE: A new QF-BV SMT Solver for hard Verification Problems combining Boolean Reasoning with Computer Algebra., , , , , , and . MBMV, page 51-60. OFFIS-Institut für Informatik, (2011)Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking., , , , , and . SASP, page 48-54. IEEE Computer Society, (2008)Software in a hardware view: New models for HW-dependent software in SoC verification and test., , , , , , , and . ITC, page 1-9. IEEE Computer Society, (2014)Path predicate abstraction by complete interval property checking., , , , and . FMCAD, page 207-215. IEEE, (2010)Validation of channel decoding ASIPs a case study., , , and . International Symposium on Rapid System Prototyping, page 74-78. IEEE, (2011)Accelerating Retiming Under the Coupled-Edge Timing Model., , and . ISVLSI, page 135-140. IEEE Computer Society, (2002)Accelerated dynamic learning for test pattern generation in combinational circuits., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 12 (5): 684-694 (1993)A New Formal Verification Approach for Hardware-dependent Embedded System Software., , , , , , , and . IPSJ Trans. System LSI Design Methodology, (2013)