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TriMedia CPU64 Application Development Environment., , , , , , , and . ICCD, page 593-598. IEEE Computer Society, (1999)MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor., , , , and . ICCD, page 425-430. IEEE Computer Society, (2001)Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks., , , and . VLSI Design, page 177-182. IEEE Computer Society, (2003)IEEE-Compliant IDCT on FPGA-Augmented TriMedia., , , , and . VLSI Signal Processing, 39 (3): 195-212 (2005)Multirate integration in a direct simulation method., , and . EURO-DAC, page 306-311. IEEE Computer Society, (1990)On Design Rule Correct Maze Routing., , and . EDAC-ETC-EUROASIC, page 407-411. IEEE Computer Society, (1994)Static cache partitioning robustness analysis for embedded on-chip multi-processors., , , and . Conf. Computing Frontiers, page 353-360. ACM, (2006)Application design trajectory towards reusable coprocessors MPEG case study., , , , and . ESTIMedia, page 33-38. IEEE Computer Society, (2004)TriMedia CPU64 Architecture., , , , , , , , , and . ICCD, page 586-592. IEEE Computer Society, (1999)Color Space Conversion for MPEG decoding on FPGA-augmented TriMedia Processor., , , and . ASAP, page 250-259. IEEE Computer Society, (2003)