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Processor Utilization Bounds for Real-Time Systems With Precedence Constraints., and . Design Autom. for Emb. Sys., 7 (1-2): 89-113 (2002)Impact of steep-slope transistors on non-von Neumann architectures: CNN case study., , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Using emerging technologies for hardware security beyond PUFs., , , , and . DATE, page 1544-1549. IEEE, (2016)Mountain Reduction, Block Matching, and Applications in Intensity-Modulated Radiation Therapy., , , , and . Int. J. Comput. Geometry Appl., 18 (1/2): 63-106 (2008)Fixed-priority scheduling to reduce both the dynamic and leakage energy on variable voltage processors., , , and . IJES, 4 (2): 127-140 (2009)Guest Editorial Special Section on Power-Aware Design for Embedded Systems., , and . IEEE Trans. Industrial Informatics, 9 (1): 485-486 (2013)moDNN: Memory Optimal Deep Neural Network Training on Graphics Processing Units., , , and . IEEE Trans. Parallel Distrib. Syst., 30 (3): 646-661 (2019)A Mixed Signal Architecture for Convolutional Neural Networks., , , , , , and . JETC, 15 (2): 19:1-19:26 (2019)A Metric for Quantifying Similarity between Timing Constraint Sets in Real-Time Systems., , and . ACM Trans. Design Autom. Electr. Syst., 16 (3): 34:1-34:33 (2011)Efficient Analog Circuits for Boolean Satisfiability., , , , , and . CoRR, (2016)